? semiconductor components industries, llc, 2013 april, 2013 ? rev. 0 1 publication order number: ntr3a30pz/d ntr3a30pz power mosfet ? 20 v, ? 2.9 a, single p ? channel 2.4 x 2.9 x 1.0 mm sot ? 23 package features ? low r ds(on) solution in 2.4 mm x 2.9 mm package ? esd diode ? protected gate ? these devices are pb ? free, halogen free/bfr free and are rohs compliant applications ? high side load switch ? battery switch ? optimized for power management applications for portable products, such as smart phones, media tablets, pmp, dsc, gps, and others maximum ratings (t j = 25 c unless otherwise stated) parameter symbol value unit drain ? to ? source voltage v dss ? 20 v gate ? to ? source voltage v gs 8 v drain current (note 1) drain current (note 1) steady state t a = 25 c i d ? 2.9 a t a = 85 c ? 2.1 t 5 s t a = 25 c ? 4.7 power dissipation (note 1) steady state t a = 25 c p d 0.48 w t 5 s 1.25 pulsed drain current t p = 10 s i dm ? 8.8 a operating junction and storage temperature t j , t stg ? 55 to 150 c esd hbm, jesd22 ? a114 v esd 2000 v source current (body diode) (note 2) i s ? 0.48 a lead temperature for soldering purposes (1/8 in from case for 10 s) t l 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. thermal resistance ratings parameter symbol max unit junction ? to ? ambient ? steady state (note 1) r ja 260 c/w junction ? to ? ambient ? t 5 s (note 1) r ja 100 1. surface ? mounted on fr4 board using 1 in sq. pad size (cu area = 1.127 in sq. [1 oz] including traces). 2. pulse test: pulse width 300 ms, duty cycle 2%. device package shipping ? ordering information http://onsemi.com ? 20 v 38 m @ ? 4.5 v r ds(on) max ? 2.9 a i d max v (br)dss ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. NTR3A30PZT1G sot ? 23 (pb ? free) 3000 / tape & reel p ? channel mosfet sot ? 23 case 318 style 21 marking diagram & pin assignment trh = specific device code m = date code* = pb ? free package (note: microdot may be in either location) *date code orientation may vary depending upon manufacturing location. trh m 1 gate 2 source drain 3 50 m @ ? 2.5 v 73 m @ ? 1.8 v d s g 1 3 2
ntr3a30pz http://onsemi.com 2 electrical characteristics (t j = 25 c unless otherwise specified) parameter symbol test condition min typ max unit off characteristics drain ? to ? source breakdown voltage v (br)dss v gs = 0 v, i d = 250 a ? 20 v drain ? to ? source breakdown voltage temperature coefficient v (br)dss /t j i d = ? 250 a, ref to 25 c 10.5 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = ? 20 v t j = 25 c ? 1 a gate ? to ? source leakage current i gss v ds = 0 v, v gs = 5 v 10 a on characteristics (note 3) gate threshold voltage v gs(th) v gs = v ds , i d = ? 250 a ? 0.4 ? 0.65 ? 1.0 v negative threshold temperature coefficient v gs(th) /t j 10.5 mv/ c drain ? to ? source on resistance r ds(on) v gs = ? 4.5 v i d = ? 3 a 31 38 m v gs = ? 2.5 v i d = ? 2.5 a 36 50 v gs = ? 1.8 v i d = ? 1.5 a 51 73 forward transconductance g fs v ds = ? 5 v, i d = ? 3 a 30 s charges and capacitances input capacitance c iss v gs = 0 v, f = 1.0 mhz, v ds = ? 15 v 1651 pf output capacitance c oss 148 reverse transfer capacitance c rss 129 total gate charge q g(tot) v gs = ? 4.5 v, v ds = ? 15 v, i d = ? 3 a 17.6 nc threshold gate charge q g(th) 0.7 gate ? to ? source charge q gs 2.4 gate ? to ? drain charge q gd 4.9 switching characteristics (note 4) turn ? on delay time t d(on) v gs = ? 4.5 v, v ds = ? 15 v, i d = ? 3 a, r g = 6.0 100 ns rise time t r 208 turn ? off delay time t d(off) 1043 fall time t f 552 drain ? source diode characteristics forward diode voltage v sd v gs = 0 v, i s = ? 0.4 a t j = 25 c 0.65 1.0 v t j = 125 c 0.47 3. pulse test: pulse width 300 ms, duty cycle 2%. 4. switching characteristics are independent of operating junction temperatures.
ntr3a30pz http://onsemi.com 3 typical characteristics ? 6 v figure 1. on ? region characteristics figure 2. transfer characteristics ? v ds , drain ? to ? source voltage (v) ? v gs , gate ? to ? source voltage (v) 4.0 3.0 2.5 2.0 1.5 1.0 0.5 0 0 2 6 8 12 14 18 20 2.5 2.0 1.5 1.0 0.5 0 2 4 6 8 14 18 20 figure 3. on ? resistance vs. gate ? to ? source voltage figure 4. on ? resistance vs. drain current and gate voltage ? v gs , gate voltage (v) ? i d , drain current (a) 4.0 4.5 3.5 3.0 2.5 2.0 1.5 1.0 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.12 5 4 2 1 0.026 0.036 0.056 0.066 0.096 0.106 0.156 0.166 figure 5. on ? resistance variation with temperature figure 6. drain ? to ? source leakage current vs. voltage t j , junction temperature ( c) ? v ds , drain ? to ? source voltage (v) 125 100 75 50 25 0 ? 25 ? 50 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 18 14 12 10 8 6 4 2 100 1000 10,000 100,000 ? i d , drain current (a) ? i d , drain current (a) r ds(on) , drain ? to ? source resistance ( ) r ds(on) , normalized drain ? to ? source resistance ? i dss , leakage (na) 3.5 4.5 4 10 16 v gs = ? 1.4 v ? 1.6 v ? 1.8 v ? 2.5 v ? 3 v 10 12 16 v ds ? 5 v t j = 125 c t j = ? 55 c t j = 25 c 0.09 0.10 0.11 t j = 25 c i d = ? 3.0 a 36 0.136 r ds(on) , drain ? to ? source resistance ( ) t j = 25 c v gs = ? 1.8 v v gs = ? 4.5 v 150 16 20 v gs = ? 4.5 v i d = ? 3.0 a t j = 150 c t j = 125 c 0.046 0.076 0.086 0.126 0.146 0.116 v gs = ? 2.5 v
ntr3a30pz http://onsemi.com 4 typical characteristics figure 7. capacitance variation figure 8. gate ? to ? source and drain ? to ? source voltage vs. total charge ? v ds , drain ? to ? source voltage (v) q g , total gate charge (nc) 18 14 12 10 8 4 2 0 0 200 600 1000 1400 1800 2000 2400 16 14 10 8 6 4 2 0 0 1 2 3 4 5 figure 9. resistive switching time variation vs. gate resistance figure 10. diode forward voltage vs. current r g , gate resistance ( ) ? v sd , source ? to ? drain voltage (v) 100 10 1 10 100 1000 10,000 1.2 1.0 0.8 0.6 0.4 0.2 0.1 1 10 figure 11. threshold voltage figure 12. maximum rated forward biased safe operating area t j , junction temperature ( c) ? v ds , drain ? to ? source voltage (v) 125 100 75 50 25 0 ? 25 ? 50 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 100 10 1 0.1 0.01 0.1 1 10 100 c, capacitance (pf) ? v gs , gate ? to ? source voltage (v) t, time (ns) ? i s , source current (a) ? v gs(th) (v) ? i d , drain current (a) 400 800 1200 1600 2200 61620 12 18 150 v gs = 0 v t j = 25 c f = 1 mhz c iss c oss c rss v ds = ? 15 v t j = 25 c i d = ? 3.0 a 0 3 6 9 15 18 12 ? v ds , drain ? to ? source voltage (v) q t q gs q gd v ds v gs v gs = ? 4.5 v v dd = ? 15 v i d = ? 3.0 a t d(off) t f t d(on) t r t j = 125 c t j = ? 55 c t j = 25 c i d = ? 250 a 0 v gs ? 8 v single pulse t c = 25 c 100 s 1 ms 10 ms dc r ds(on) limit thermal limit package limit
ntr3a30pz http://onsemi.com 5 typical characteristics figure 13. fet thermal response pulse time (sec) 0.1 0.01 0.001 0.0001 0.00001 0.000001 0.1 1 10 100 1000 r(t) ( c/w) 1 10 100 1000 single pulse 50% duty cycle 20% 10% 5% 2% 1%
ntr3a30pz http://onsemi.com 6 package dimensions sot ? 23 (to ? 236) case 318 ? 08 issue ap d a1 3 12 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. 4. dimensions d and e do not include mold flash, protrusions, or gate burrs. mm inches scale 10:1 0.8 0.031 0.9 0.035 0.95 0.037 0.95 0.037 2.0 0.079 soldering footprint* view c l 0.25 l1 e e e b a see view c dim a min nom max min millimeters 0.89 1.00 1.11 0.035 inches a1 0.01 0.06 0.10 0.001 b 0.37 0.44 0.50 0.015 c 0.09 0.13 0.18 0.003 d 2.80 2.90 3.04 0.110 e 1.20 1.30 1.40 0.047 e 1.78 1.90 2.04 0.070 l 0.10 0.20 0.30 0.004 0.040 0.044 0.002 0.004 0.018 0.020 0.005 0.007 0.114 0.120 0.051 0.055 0.075 0.081 0.008 0.012 nom max l1 h 2.10 2.40 2.64 0.083 0.094 0.104 h e 0.35 0.54 0.69 0.014 0.021 0.029 c 0 ??? 10 0 ??? 10 style 21: pin 1. gate 2. source 3. drain *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 ntr3a30pz/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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